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FPGA implementation of decision functions
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Two tools of automatic VHDL generation are developped in this project. The first one is a tool allowing real-time decision using approximation of the SVM decision rule, and the second one is an automatic generation of the Boosting decision rule.

Abstract of SVM approximation

A real-time implementation of an approximation of the support vector machine decision rule is proposed. This method is based on an improvement of a supervised classification method using hyperrectangles, which is useful for real-time image segmentation. The final decision combines the accuracy of the SVM learning algorithm and the speed of a hyperrectangles based method. We review the principles of the classification methods and we evaluate the hardware implementation cost of each method. We present the combination algorithm which consists of rejecting ambiguities in the learning set using SVM decision, before using the learning step of the hyperrectangles-based method. We present results obtained using Gaussian distribution and give an example of image segmentation from an industrial inspection problem. The results are evaluated regarding hardware cost as well as classification performances.

Abstract of Adaboost hardware implementation

We propose a method and a tool for automatic generation of hardware implementation of a decision rule based on the Adaboost algorithm. We review the principles of the classification method and we evaluate its hardware implementation cost in terms of FPGA’s slice, using different weak classifiers based on the general concept of hyperrectangle. The main novelty of our approach is that the tool allows the user to find automatically an appropriate trade-off between classification performances and hardware implementation cost, and that the generated architecture is optimised for each training process. We present results obtained using Gaussian distributions and examples from UCI databases. Finally, we present an example of industrial application of real-time textured image segmentation.

 

 

Publications :

  • Journal

    • "Automatic Hardware Implementation Tool for a Discrete Adaboost-Based Decision Algorithm", Johel MITERAN, Jiri MATAS, Elbey BOURENNANE, Michel PAINDAVOINE, Julien DUBOIS, EURASIP Journal on Applied Signal Processing, Hindawi, 2005 (7), pp. 1035-1046, 2005, paperboosting_v5_1.pdf
    • "Détection de défauts temps réel sur des objets à géométrie complexe : étude par SVM, boosting et hyperrectangles", Sébastien BOUILLANT, Johel MITERAN, Michel PAINDAVOINE, Jiri MATAS, Traitement du Signal, 21 (1), pp. 55-69, 2004, miteran_ts.pdf
    • "SVM approximation for real-time image segmentation by using an improved hyperrectangles-based method", Johel MITERAN, Sébastien BOUILLANT, Elbey BOURENNANE, Real-Time Imaging, Elsevier, 9 (3), pp. 179-188, Juin 2003, miteran_rti.pdf


    Conferences

    • "BOOSTING : FROM DATA TO HARDWARE USING AUTOMATIC IMPLEMENTATION TOOL", Johel MITERAN, Jiri MATAS, Julien DUBOIS, Elbey BOURENNANE, Eusipco, Vienne, Autriche, September 2004.
    • "Automatic FPGA based implementation of a classification tree", Johel MITERAN, Jiri MATAS, Julien DUBOIS, Elbey BOURENNANE, SCS'2004 Signaux, Circuits et Systèmes, Monastir, Tunisia, pp. 189-192, 18 March 2004.
    • "Classification boundary approximation by using combination of training steps for real-time image segmentation", Johel MITERAN, Sébastien BOUILLANT, Elbey BOURENNANE, MLDM'03, Springer-Verlag, Leipzig, Allemagne, 1, pp. 38-42, July 2003, miteran_MLDM_2003.pdf

 

    • "Implantation automatique et optimisée d’une fonction de décision à l’aide des SVM et du VHDL", Johel MITERAN, Sébastien BOUILLANT, Michel PAINDAVOINE, Elbey BOURENNANE, RFIA 2004, 2004.
FPGA implementation of decision functions